1. Field of the Invention
The present invention relates to a plasma display panel, and more particularly, to a plasma display panel driven such that it is separated into an upper panel and a lower panel.
2. Description of the Related Art
FIG. 1 shows a three-electrode surface-discharge alternating-current plasma display panel. Referring to the drawing, address electrode lines A.sub.1, A.sub.2, A.sub.3, . . . , A.sub.m-1 and A.sub.m, a dielectric layer 11, scan electrode lines Y.sub.1, Y.sub.2, . . . , and Y.sub.n, common electrode lines X.sub.1, X.sub.2, . . . , and X.sub.n and a MgO protective film 12 are provided between front and rear glass substrates 10 and 13 of a surface-discharge plasma display panel 1.
A partition wall 15 and the address electrode lines A.sub.1, A.sub.2, A.sub.3, . . . , A.sub.m-1 and A.sub.m coat the entire surface of the rear glass substrate 13 in a parallel pattern. Here, the partition wall 15 partitions a discharge space accurately during the operation of the plasma display panel 1. A phosphor (not shown) may coat the front surface of the address electrode lines A.sub.1, A.sub.2, A.sub.3, . . . , A.sub.m-1 and A.sub.m. Otherwise, the phosphor may coat a dielectric layer in the event the dielectric layer coats the front surface of the address electrode lines A.sub.1, A.sub.2, A.sub.3, . . . , A.sub.m-1 and A.sub.m.
The common electrode lines X.sub.1, X.sub.2, . . . , and X.sub.n and the scan electrode lines Y.sub.1, Y.sub.2, . . . , and Y.sub.n are arranged on the rear surface of the front glass substrate 10 orthogonal to the address electrode lines A.sub.1, A.sub.2, A.sub.3, . . . , A.sub.m-1 and A.sub.m in a predetermined pattern. The respective intersections define corresponding pixels. The dielectric layer 11 is entirely coats the rear surface of the common electrode lines X.sub.1, X.sub.2, . . . , and X.sub.n and the scan electrode lines Y.sub.1, Y.sub.2, . . . , and Y.sub.n. The MgO protective film 12 for protecting the panel 1 against strong electrical fields entirely coats the rear surface of the dielectric layer 11. A gas for forming a plasma is hermetically sealed in a discharge space 14. The sealing process will now be briefly described. The discharge space 14 is exhausted through an exhaust pipe provided in the discharge space 14 of the sealed panel 1, thereby increasing the degree of vacuum. The gas for forming a plasma is injected into the discharge space 14 through the exhaust pipe and then the exhaust pipe is hermetically sealed.
Referring to FIG. 2, in a conventional plasma display panel of a separation drive type, address electrode lines are divided into upper lines A.sub.1U, A.sub.2U, A.sub.3U, . . . , A.sub.m-1U and A.sub.mU and lower lines A.sub.1L, A.sub.2L, A.sub.3L, . . . , A.sub.m-1L and A.sub.mL and separately driven, while each partition wall 15 remains without being separated.
According to the conventional plasma display panel of a separation drive type, the vacuum-conductance of the discharge space (14 of FIG. 1) is lowered due to the partition wall 15. Thus, the exhaustion of the discharge space 14 does not occur properly. In particular, impurities remaining in the middle of the partition wall 15 deteriorate the purity of the gas for forming a plasma, thereby degrading the picture quality of the plasma display panel (1 of FIG. 1).
The driving method generally adopted for the plasma display panel described above is an address/display separation driving method in which a reset step, an address step and a sustain discharge step are sequentially performed in a unit sub-field. In the reset step, wall charges remaining in the previous sub-field are erased. In the address step, the wall charges are formed in a selected pixel area. Also, in the sustain discharge step, light is produced at the pixel at which the wall charges are formed in the address step. In other words, if alternating pulses of a relatively high voltage are applied between the common electrode lines X.sub.1, X.sub.2, . . . , X.sub.n-1 and X.sub.n and the scan electrode lines Y.sub.1, Y.sub.2, . . . , Y.sub.n-1 and Y.sub.n, a surface discharge occurs at the pixel at which the wall charges are located. Here, a plasma is formed at the gas layer of the discharge space 14 and the phosphors 142 are excited by ultraviolet rays and emit light.